Audio-GD R1 MKIII - Fully Discrete R2R DAC

1 piece silver in stock and ready to ship immediately. Otherwise: delivery time approx. 2 weeks.
(The devices are handmade to customer order)

Highlights

• Built-in isolator for complete isolation of all inputs, including USB, HDMI, and SPDIF inputs, as well as the FPGA processor from the analog parts.

• Fully symmetrical design of the analog parts with discrete transistors.

• Separate R-core transformer power supply, integrated 7 ultra-speed linear power supplies, and two pure Class-A power supplies.

• True symmetrical DAC design, integrated 4 groups of fully discrete, true symmetrical DSD native decoders, 8 groups of fully discrete R-2R PCM decoders, and 32-bit / PCM384K / DSD512 asynchronous transfer Amanero 384.

• USB transmits the IIS signal to the FPGA processor and receives the clock signal from the FPGA processor; the USB interface has no integrated data clocks, the signal transmission is very accurate, and the sound quality is significantly improved.

• The FPGA processes data in parallel mode. IIS data is transmitted in serial mode, with each data transmission requiring one clock cycle for processing or transmission. A data frame (including L and R data) requires 64 clock cycles for processing or transmission, so the data is affected by the 64 clock cycles.

• In contrast, in parallel data processing and transmission mode, only one clock cycle is required to complete the processing and transmission of a data frame, avoiding the influence of clock stability.

• The IIS input (including USB and HDMI-IIS) is combined into dual 32-bit parallel data after input, the SPDIF input is combined into dual 24-bit parallel data after the decoder, and the DSD input is combined into dual 64-bit parallel data.

Advantages and disadvantages of the R-2R DAC 

Advantages

1. The R-2R does not convert the clock signal into the output signal.

2. R-2R is insensitive to jitter, while Delta-Sigma D/A is much more sensitive to jitter.

3. The output signal is much more precise compared to Delta-Sigma D/A.

Disadvantages

1. The distortion factor is extremely good today with Sigma-Delta chips; R2R ladders are also good, but not as good.

2. Disturbances and accuracy of the resistor ladder are very difficult to avoid and require complex technology to fix.

R-2R basic design on the market

The R-2R DAC is very popular nowadays and is available from DIY kits to high-end products.

In the lower segment of the DIY market, the R-2R design often relies on old technology developed long ago by MSB and includes only the basic R2R ladder design, not the wonderful correction design of the original MSB technology. This design uses data shift register logic chips in serial mode to convert data into an analog signal. The structural problems of R2R technology cannot be avoided, and performance depends solely on the accuracy of the ladder resistors.

In the high-end market, the R2R design is much more complex and achieves the best performance. A simple R2R ladder is simply not enough to achieve good performance and sound quality! Some manufacturers use shift registers. A less complex and less powerful design based on traditional logic chips operating in serial mode to correct the ladder.

A much better design switches resistors in parallel mode. An ultra-fast FPGA controls and corrects the R2R ladder. The parallel design mode controls each bit individually, achieving unprecedented performance. (In parallel mode, only 1 clock cycle is needed to output all data; the serial design mode requires at least 8 to 24 clock cycles.) The parallel design is much more complex. When properly designed, it can correct every bit of the ladder. The photo below shows a design with such an FPGA that can correct the inevitable shortcomings of R2R ladders caused by resistor tolerance and glitches to achieve the best performance.


Accuracy of ladder resistors (tolerance)

Many believe that the tolerance of the resistors in the ladder is the most important factor to achieve the best performance. Nowadays, a 24-bit resolution is standard. What tolerance is required to achieve a 24-bit resolution?
At 16 bits, a tolerance of 1/65536, 0.1% (1/1000) is far from sufficient; even a tolerance of 0.01% (1/10000), the best tolerance available today, cannot correctly handle 16-bit requests; and we are not even considering 24 bits here!

The tolerance of the resistor will never solve the imperfections of a ladder. This would require resistors with a tolerance of 0.00001% that can handle a 24-bit resolution. This is only theoretically possible, as discrete logic chips already have too high an internal impedance and would destroy the impossible tolerance of a resistor.

The solution is to correct the traces and not rely solely on resistor tolerance. It is a combination of both: ultra-low tolerance resistors controlled by a correction technology with a very fast FPGA are applied in our design.


The Importance of FPGA/CPLD

FPGA stands for Field Programmable Gate Array. Nowadays, FPGAs are used in many high-end DACs, such as the popular ROCKNA WAVEDREAM DAC.
We have used FPGA in our DAC products since 2008.
The R-7 has 1 FPGA and 5 CPLD programmable chipsets built in to separate the various configured circuits and avoid interruptions.

The internal hardware design is fully controlled by complex software. A major advantage is that the software in the FPGA can be easily upgraded to add new features or improve performance. Such a design is very flexible and future-proof!
　

FPGA/CPLD Tasks

1. The FPGA high-performance SPDIF interface replaces traditional SPDIF interface chips like DIR9001, WM8805, or AK411X, which have lower performance compared to the FPGA.

2. Complete re-clocking process with FIFO design for all inputs. This fully synchronizes output data with the clock signal to avoid any jitter.

3. Built-in 2X, 4X, and 8X oversampling and digital filters plus 4 different NOS modes (only analog 6dB filtering). This lets you customize it exactly to your taste!

4. Built-in special design to simulate the TDA1541A + SAA7220 sound.

Specifications